Consumers desire ever cheaper electrical and electronic devices. A major part of the cost in producing consumer electrical and electronic devices is the cost of the semiconductor devices that provide the very features that make the electronic devices so desired by consumers. Manufacturers of the semiconductor devices thus continue to seek ways to lessen manufacturing costs of the semiconductors. A significant factor in the determination of unit cost for semiconductor devices is defects that may present themselves in a given production lot. As may be realized, loss of semiconductor devices through defects presents a fiscal loss to manufacturers that may generally be accommodated by increasing unit price. An area where defects may be introduced in fabrication of semiconductor devices is in the wafer of substrate bonding. Wafer bonding involves applying heat, force, and sometimes voltage to an aligned stack of two or ore wafers in a controlled atmosphere. The goal of any wafer bonding is to produce high integrity bonds, uniformly across the entire wafer area without negatively influencing the wafer to wafer alignment. Improved bonding integrity has been achieved by generating higher interfacial pressures. For improved bonding results, the interfacial pressure can be quite high, and hence it is desired that substantial force be applied to the wafers to be bonded. For example 90 KN on a 200 mm diameter wafer or 100 KN on a 300 mm diameter wafer. However, although enabling the bond, the high forces also cause flex and distortion of conventional bonding tools that apply the forces, resulting in poor interfacial pressure uniformity, bond quality variability and wafer shift and defeating the improvements sought by using high bonding forces. In conventional systems the pressure non-uniformity approaches 50% across the bond interface.
Accordingly, it would be desirable to provide a bonding apparatus that could apply uniform pressure across the entire bond interface.